FASTIMAGE1303 PCI BOARD
FastImage1303 is an Autonomous Imaging System (AIS) that offers a balanced architecture of flexible I/O and processing power with computational and memory bandwidth, typically required by demanding, real-time imaging, vision, and DSP applications. And FastImage1303 is based on the TriMedia TM1302 microprocessor from Philips Semiconductors.
The Philips PNX1302 Processor
The Philips developed PNX1302 is a high-performance programmable single-chip processor that delivers real-time processing of audio, video, graphics, and communications datastreams. The PNX1303 employs a typical Very Long Instruction Word (VLIW) architecture capable of 720 MFLOPS/900 MIPS peak and has a 32-bit CPU that connects instruction and data caches at rates of 4 GB/sec and 1100 MB/sec peak. By incorporating the TriMedia processor into Alacron’s new FastImage1303, customers and developers can significantly increase their processing power enabling them to work more efficiently and cost effectively. For more information on the PNX 1302 processor click below.
PNX1300
Datasheet(
409 KB)
FastImage1303 Features
- Collects data from up to three asynchronous analog cameras and one NTSC/PAL/SECAM or up to four digital cameras
- Up to 667-720 MFLOPS / 833-900 MIPS per TM1300 processor
- Up to four TM1300 processors
- 8-16 MB SDRAM per processor
- Three 85 MHz, 28 bit bi-directional Camera Link ( Channel Link) ports
- TriMedia software development environment (SDE) for Windows® 9X/NT/2K and Solaris™
- Real-time operating system for single and multiple processors; for Windows 9X/NT/2K, Solaris and Linux
- Programmable FPGAs for I/O interface configuration
- Input options:
- Digital, 32 data bits (RS-422, LVDS) with control and clock
- NTSC/PAL/SECAM
- Three asynchronous RS-170 inputs or one RGB input
- Output options:
- SVGA
- RS-170
- NTSC/PAL
- Digital, 32 data bits with control and clock
- 32 bit bidirectional interboard communication links
- Optional continuous composite NTSC/PAL and SVGA video output
- Available for PCI computers
- Fast Channel:
- 80 MHz 32 bit persistent channels in 4 bit increments for intra- and interboard communication
- Point to point connections at up to 320 MB/s via cross bar interconnect
- Data traffic does not affect host CPU or PCI bus
- For more information on Fast Channel click here.
Technical Specifications
| NTSC/PAL Composite Video Capture | |
|
Input
levels
|
1V
peak-to-peak nom. 0.3 to 1.2V peak-to-peak max. |
|
Input
impedance
|
75 Ohms |
|
Channel
crosstalk
|
-50 dB max. |
|
Resolution
|
8 bits |
|
Formats
supported
|
PAL BGHI, PAL N, PAL M, NTSC N, NTSC M, NTSC 4.43, NTSC-Japan, SECAM |
| Analog Video Capture (3 Channels) | |
| Input levels | 1V
peak-to-peak nom. 2.0V peak-to-peak max.; 50mV min. sync level when using composite sync |
| Input impedance | 75 Ohms |
| Resolution | 8 bits * 3 channels |
| Formats supported | line scan and area scan |
| Input option | Each input can operate async with an 80 MHz sample rate |
| Digital Video Capture | |
| Common mode input range | -5V
to +5V (0 to 2.4V with LVDS option) |
| Input sensitivity | 250
mV differential (100mV with LVDS option) |
| Input hysteresis | 50 mV typical |
| Max. clock rate | 80 MHz |
| Max. input data width | 32 bits |
| Formats supported | ITU-R
BT.656 (4:2:2 interlaced color) 8/10-bit mono variable/line scan 8/10-bit raw data 8/10-bit RGB 16-bit raw at 20 MHz (40 MB/sec.) |
| Input Levels | RS-422, LVDS signaling |
| Channel Link (LVDS) | |
| Differential output voltage | +250 - 450mV |
| Data rate | >400 Mbps. |
| Digital Video Output | |
| Output levels | RS-422 |
| Max. clock rate | 80 MHz |
| Max. output data width | 32 bits |
| Formats supported | ITU-R
BT.656 (4:2:2 interlaced color) 8/16-bit raw data |
| Camera Control | |
| Serial port | Asynch. RS-232, 600–19,200 baud |
| Frame/line start outputs | 2 RS-422 |
| Exposure control out. | 2 RS-422 |
| Master clock out. | 1 or 2 RS-422 programmable in 0.07 Hz steps up to 40 MHz |
| General purpose out. | 4 RS-422 |
| Pixel clock inputs | 2 RS-422 |
| Line/frame valid in. | 4 RS-422 |
| External trigger in. | 2 RS-422 |
| Gen. purpose in. | 4 RS-422 |
| Power | No camera power provided by card; use an external supply |
| RS-422 input | RS-422, LVDS signaling |
| Video Output | |
| Composite output | NTSC/PAL |
| S-video output | NTSC/PAL (luma shared with composite) |
| Monitor Output | |
| Output type | VGA standard analog RGB |
| Frame rate | up to 72 Hz |
| Color depth | up to 24 bits/pixel |
| Resolution | Up to 1280 x 1024 |
| PCI Interface | |
| Clock rate | 33 MHz max. |
| Data width | 32 bits |
| Peak DMA rate | 132 MB/sec. |
| Standards compliance | PCI Rev. 2.1 |
FastChannel
Alacron's FastChannel is a mechanism for the FastSeries components to communicate with the processing environment without impacting the PCI bus.
Alacron has acknowledged the need for a non-bussed form of data transfer within any high performance DSP or Imaging application. Bussed communication schemes are subject to bus saturation and contention, limiting their usefulness. The ideal interconnection scheme is to allow point to point communication from a data source to one or more data sinks. Each interconnection supports its data transfer and is isolated from any other data transfer, preventing bus saturation and contention.
FastChannel is Alacron's implementation of a point to point or point to many points connection between a data source and its sinks. FastChannel is available on Alacron's FastImage product and supports connections between the FastImage's internal resources - on the P4 connector of the PMC locations and on two ribbon cable connections for interboard communication.
In addition to its support for the one to many data transfers, FastChannel is configurable at startup. During operation the interconnections are static. Alacron has found that the need for an interconnection between a data source and sink is not dynamic in real-time and in high performance data processing applications - especially when the data rates are high. This fact allows for a significantly lower cost interconnect solution, and at the same time a simplification in software. No special hardware is required for source and destination addresses, arbitration, and control of the channel. Very simple software protocols can be implemented as the only operation allowed is the transfer of one 'word' of data.
The FastChannel is made up of three things, a parallel data path from 1 to 32 bits, a clock, and a data valid. In the current implementation, clock speeds are limited to 80 MHz and below, making the highest peak data transfer rate between a source and its sinks of 320 MB/s. The many connections in the FastChannel make it difficult to report an "overall" performance of the FastChannel - one specification that is often quoted is the cross section band-width, which is the sum of all active channels (non-blocked) data rates in the best cast. The cross-section bandwidth is 2.4 GB per second per FastImage board. Interboard communication is limited to 320 MB/s.
